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  pdfcreator={LaTeX via pandoc}}

\title{gpu-mesh}
\author{}
\date{}

\begin{document}
\maketitle

\begin{quote}
\textbf{Source:}
\url{https://foxhop.net/053ba7da-6277-11f1-82fc-040140774501/gpu-mesh}\\
\textbf{Snapshot:} 2026-06-07T17:42:01Z\\
\textbf{Generator:} Remarkbox \texttt{50b9d1e}

\emph{This is a thread snapshot. The living document lives at the source
URI above --- it may have been edited, extended, or replied-to since.}
\end{quote}

\begin{figure}
\centering
\caption{Scan for living source}
\end{figure}

\hypertarget{gpu-mesh-hardware-benchmarks}{%
\section{3-GPU Mesh --- Hardware \&
Benchmarks}\label{gpu-mesh-hardware-benchmarks}}

\textbf{Status:} 3-node mesh live on port 8320 (BEND)\\
\textbf{Wire substrate:} lumbda\textquotesingle s \texttt{bend}
primitive (\href{https://lumbda.com/bend.html}{lumbda.com})\\
\textbf{Coordinator pattern:} cost-routed fan-out via greedy bin-pack

\begin{center}\rule{0.5\linewidth}{0.5pt}\end{center}

\begin{center}\rule{0.5\linewidth}{0.5pt}\end{center}

\hypertarget{what-this-page-tracks}{%
\subsection{What this page tracks}\label{what-this-page-tracks}}

Three Nvidia GPUs across three hosts on our foxhop LAN serve as a bend
mesh --- lumbda\textquotesingle s CUDA dispatch primitive routes work to
whichever node finishes fastest. This page documents our hardware, our
published benchmarks, \& our cost-routed coordinator pattern.

For our ecdsa research context that drove our first 18-cell bench
(refined Bernstein-Yang point-add variant sweep at p=251), see
\href{https://www.foxhop.net/5243e3fe-6146-11f1-8ce9-040140774501/secp256k1-point-addition-challenge-with-lumbda-attack}{foxhop
secp256k1 lever sweep}.

\begin{center}\rule{0.5\linewidth}{0.5pt}\end{center}

\hypertarget{hardware}{%
\subsection{Hardware}\label{hardware}}

\begin{longtable}[]{@{}llll@{}}
\toprule\noalign{}
host & GPU & VRAM & arch \\
\midrule\noalign{}
\endhead
\bottomrule\noalign{}
\endlastfoot
\texttt{3090-ai.foxhop.net} & RTX 3090 & 24 GB & sm\_86 \\
\texttt{ai.foxhop.net} & RTX 4090 & 24 GB & sm\_89 \\
\texttt{cammy.foxhop.net} & Tesla P40 & 24 GB & sm\_61 \\
\end{longtable}

72 GB combined VRAM across our pool. Pascal (sm\_61) P40 lacks our newer
architectures\textquotesingle{} reduced-precision tensor units, so it
runs \textasciitilde2× slower than Ampere 3090 on identical workloads
--- useful as a third concurrent stream rather than a faster replacement
for either Ampere card.

\begin{center}\rule{0.5\linewidth}{0.5pt}\end{center}

\hypertarget{port-8320-bend}{%
\subsection{Port 8320 --- BEND}\label{port-8320-bend}}

Our pool serves bend dispatches on port \textbf{8320} across every host.
Mnemonic --- 8320 spells BEND:

\begin{verbatim}
8 ~= B (implied infinity B flattened; bake a cake; baby & me)
3 ~= E (backward)
2 ~= N (pivoted 90 degrees)
0 ~= D (flattened)
\end{verbatim}

Each node runs \texttt{gpu-worker.lsp} (lumbda\textquotesingle s
reference CUDA worker) against demo\_ops, blake3-fanout, radix-sort, \&
our other registered CUDA forms. Clients reach our mesh via
lumbda\textquotesingle s \texttt{bend} primitive over TCP, S-expression
wire format, \& per-form binary protocols (\texttt{BSHK} for shake
fanout, \texttt{BSCP} for batched scalar mul, \texttt{BSRT} for radix
sort, etc. --- see \href{https://lumbda.com/bend.html}{lumbda.com}/bend
for our form catalog). Our bend wire stays LAN-only; we do \textbf{not}
expose our mesh outside our foxhop network.

\begin{center}\rule{0.5\linewidth}{0.5pt}\end{center}

\hypertarget{benchmark-6-variants-3-hosts-at-p251}{%
\subsection{Benchmark --- 6 variants × 3 hosts at
p=251}\label{benchmark-6-variants-3-hosts-at-p251}}

Our first published benchmark dispatched 6 ecdsa point-add variants
(Bernstein-Yang lever sweep) at p=251 to every host through our wire
protocol. Σ Toffoli matches \textbf{byte-for-byte} across hosts on
identical ops.bin inputs --- proves our distributed mesh runs from one
canonical lumbda environment.

GPU wall (ms/batch) at 1024 shots, lower wins:

\begin{longtable}[]{@{}
  >{\raggedright\arraybackslash}p{(\columnwidth - 8\tabcolsep) * \real{0.1918}}
  >{\raggedright\arraybackslash}p{(\columnwidth - 8\tabcolsep) * \real{0.1918}}
  >{\raggedright\arraybackslash}p{(\columnwidth - 8\tabcolsep) * \real{0.1918}}
  >{\raggedright\arraybackslash}p{(\columnwidth - 8\tabcolsep) * \real{0.1918}}
  >{\raggedright\arraybackslash}p{(\columnwidth - 8\tabcolsep) * \real{0.1918}}@{}}
\toprule\noalign{}
\begin{minipage}[b]{\linewidth}\raggedright
variant
\end{minipage} & \begin{minipage}[b]{\linewidth}\raggedright
Σ Tof / shot
\end{minipage} & \begin{minipage}[b]{\linewidth}\raggedright
3090 ms
\end{minipage} & \begin{minipage}[b]{\linewidth}\raggedright
4090 ms
\end{minipage} & \begin{minipage}[b]{\linewidth}\raggedright
P40 ms
\end{minipage} \\
\midrule\noalign{}
\endhead
\bottomrule\noalign{}
\endlastfoot
v-fermat -schoolbook & 167 984 & 290.1 & 149.2 & 531.7 \\
v-fer mat-solinas & \begin{minipage}[t]{\linewidth}\raggedright
\begin{quote}
84 208
\end{quote}
\end{minipage} & 151.4 & \begin{minipage}[t]{\linewidth}\raggedright
\begin{quote}
86.3
\end{quote}
\end{minipage} & 288.6 \\
v-by-text -schoolbook & \begin{minipage}[t]{\linewidth}\raggedright
\begin{quote}
45 104
\end{quote}
\end{minipage} & \begin{minipage}[t]{\linewidth}\raggedright
\begin{quote}
68.4
\end{quote}
\end{minipage} & \begin{minipage}[t]{\linewidth}\raggedright
\begin{quote}
39.3
\end{quote}
\end{minipage} & 131.8 \\
v-by-t ext-solinas & \begin{minipage}[t]{\linewidth}\raggedright
\begin{quote}
40 176
\end{quote}
\end{minipage} & \begin{minipage}[t]{\linewidth}\raggedright
\begin{quote}
60.6
\end{quote}
\end{minipage} & \begin{minipage}[t]{\linewidth}\raggedright
\begin{quote}
35.6
\end{quote}
\end{minipage} & 119.3 \\
v-by-ref -schoolbook & \begin{minipage}[t]{\linewidth}\raggedright
\begin{quote}
29 104
\end{quote}
\end{minipage} & \begin{minipage}[t]{\linewidth}\raggedright
\begin{quote}
32.5
\end{quote}
\end{minipage} & \begin{minipage}[t]{\linewidth}\raggedright
\begin{quote}
25.7
\end{quote}
\end{minipage} & \begin{minipage}[t]{\linewidth}\raggedright
\begin{quote}
85.1
\end{quote}
\end{minipage} \\
v-by- ref-solinas & \begin{minipage}[t]{\linewidth}\raggedright
\begin{quote}
24 176
\end{quote}
\end{minipage} & \begin{minipage}[t]{\linewidth}\raggedright
\begin{quote}
26.5
\end{quote}
\end{minipage} & \begin{minipage}[t]{\linewidth}\raggedright
\begin{quote}
22.0
\end{quote}
\end{minipage} & \begin{minipage}[t]{\linewidth}\raggedright
\begin{quote}
64.0
\end{quote}
\end{minipage} \\
\end{longtable}

Per-architecture pattern reads cleanly:

\begin{itemize}
\tightlist
\item
  \textbf{Ampere 4090 (sm\_89)} runs 1.94× faster than 3090 (sm\_86) on
  our heaviest circuit, shrinking to 1.20× on our lightest. Larger
  circuits amortize kernel-launch overhead; smaller circuits hit our
  GPU\textquotesingle s overhead floor.
\item
  \textbf{Pascal P40 (sm\_61)} runs \textasciitilde2× slower than 3090
  across our entire variant chain. Older arch, lower base clock, no
  reduced-precision tensor units; still serves a third concurrent stream
  as our candidate queue deepens.
\end{itemize}

GPU wall scales linearly with Σ Toffoli --- no kernel-level surprise.
Cross-host Σ Toffoli identity confirms bit-exact reproducibility across
our pool.

\begin{center}\rule{0.5\linewidth}{0.5pt}\end{center}

\hypertarget{coordinator-fan-out}{%
\subsection{Coordinator fan-out}\label{coordinator-fan-out}}

A cost-routed coordinator dispatches candidates across our 3-node mesh
concurrently. Greedy bin-pack by predicted Σ Toffoli; each candidate
lands on whichever node\textquotesingle s finish time after add stays
lowest. Per-host speed factor derived from our bench above:

\begin{itemize}
\tightlist
\item
  3090: factor 1.00 (baseline)
\item
  4090: factor 0.51
\item
  P40: factor 1.84
\end{itemize}

One worker thread per node fires concurrently against our wire protocol.
Each node serializes its own queue (workers do not multiplex requests
cleanly inside one CUDA context).

First-run finding: cost model based only on (predicted Σ Toffoli × host
factor) misses our per-request overhead floor (\textasciitilde600 ms on
cammy for demo\_ops process spawn + Pascal CUDA init). Refinement
options: a per-host startup constant plus a Σ Toffoli linear term, fit
per node from our sweep history. Coordinator runs correctly today;
schedule shape needs calibration, not algorithmic change.

\begin{center}\rule{0.5\linewidth}{0.5pt}\end{center}

\hypertarget{pool-capacity-math}{%
\subsection{Pool capacity math}\label{pool-capacity-math}}

Coordinator at saturation. Three nodes scoring three different
candidates simultaneously closes our sequential 6-variant 3090 wall (629
ms) into a parallel one. Refined-Solinas runs in \textasciitilde25 ms on
3090 + 22 ms on 4090 + 64 ms on P40 --- P40 lags but contributes a third
concurrent stream as our candidate queue deepens. Per-host routing
(heavy circuits to faster GPUs, light circuits to P40) maximizes
aggregate dispatch.

Pool throughput grows with our candidate generation rate --- see our
ecdsa research page\textquotesingle s "Why CPU Produces \& GPU Scores"
section for our substrate-level math on candidate-emit vs
candidate-score throughput.

\begin{center}\rule{0.5\linewidth}{0.5pt}\end{center}

\hypertarget{related-pages}{%
\subsection{Related pages}\label{related-pages}}

\begin{itemize}
\tightlist
\item
  \href{https://www.foxhop.net/5243e3fe-6146-11f1-8ce9-040140774501/secp256k1-point-addition-challenge-with-lumbda-attack}{foxhop
  secp256k1 lever sweep} --- research context; full 18-cell cross-scale
  Pareto sweep; lumbda emit pipeline lift.
\item
  \href{https://lumbda.com/bend.html}{lumbda.com/bend} --- bend
  primitive catalog; wire protocol; CUDA form list.
\end{itemize}

\begin{center}\rule{0.5\linewidth}{0.5pt}\end{center}

\emph{Updated 2026-06-07.}

\begin{center}\rule{0.5\linewidth}{0.5pt}\end{center}

\textbf{Source:}
\url{https://foxhop.net/053ba7da-6277-11f1-82fc-040140774501/gpu-mesh}\\
\textbf{Snapshot:} 2026-06-07T17:42:01Z\\
\textbf{Generator:} Remarkbox \texttt{50b9d1e}

\end{document}
